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VERSION:2.0
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SUMMARY:FPGAs for High Performance Computing
DTSTART:20261104T080000Z
DTEND:20261105T130000Z
DTSTAMP:20261109T202800Z
UID:indico-event-4314@indico.ijs.si
CONTACT:eurocc@sling.si
DESCRIPTION:Speakers: Ratko Pilipovic\, Davor Sluga\n\nDescription: The wo
 rkshop introduces the fundamentals of HPC technologies and shows how FPGAs
  are programmed in an HPC context through the high-level synthesis (HLS) d
 esign flow\, using C/C++ rather than hardware description languages. Throu
 gh simple examples\, participants will learn how to write synthesizable ke
 rnels\, transfer data between the host and an FPGA board\, and apply optim
 ization techniques. As a case study\, we will develop an accelerator for C
 holesky matrix decomposition on AMD-Xilinx FPGAs.\nThis workshop is jointl
 y organized by the Competence Centre for Chips (Chips.si) and the Competen
 ce Centre for High-Performance Computing (Sling.si). At the workshop\, we 
 introduce the fundamentals of HPC technologies\, covering computing archit
 ectures\, parallelism\, and the role of hardware accelerators in modern su
 percomputing\, and then explore how FPGAs are programmed in an HPC context
  through the high-level synthesis (HLS) design flow.\nHLS allows applicati
 on-specific accelerators to be described\, debugged\, and implemented on F
 PGAs using C/C++ rather than hardware description languages such as VHDL o
 r Verilog. Through simple examples\, participants will learn how to write 
 synthesizable kernels\, transfer data between the host and an FPGA board\,
  and apply optimization techniques to improve speed and resource utilizati
 on.\nAs a case study\, we will develop an accelerator for Cholesky matrix 
 decomposition using C/C++ together with the OpenCL and XRT libraries on AM
 D-Xilinx FPGAs. While the sessions primarily target AMD-Xilinx boards\, th
 e principles gained apply just as well to FPGAs from other vendors.\nLangu
 age: Englsih\nDifficulty: Intermediate\nMax. number of participants: 15\n
 Date: 4. 11. 2026  9:00-14:00 in 5.11.2026 9:00-14:00\nVirtual location: 
  Zoom\nTarget audience: Everyone is eligible to attend the workshop.\nSki
 lls gained:\n•    understanding the architecture of supercomputers and
  heterogeneous systems•    understanding the operation of heterogeneou
 s computer systems with FPGA•    understanding the FPGA technology• 
    understanding the concepts of OpenCL and XRT software frameworks and 
 HLS•    how to write\, translate\, and run programs for FPGA•    h
 ow to use HLS directives for design optimization\nWorkflow:  The training
  takes place online over two days. Participants work through remote access
  to a server using an SSH client and need a personal computer or laptop.\n
  \nOrganisers:\n\nCompetence Centre for Chips (https://cc-chip.si/slo/) 
 \n\n \n\n \n\n\n \nPredavatelji:\n\n\n\n\nIme:\nDavor Sluga\n\n\nOpis:\
 nhttps://fri.uni-lj.si/sl/o-fakulteti/osebje/davor-sluga \n\n\nE-mail:\nd
 avor.sluga@fri.uni-lj.si\n\n\n\n\n\n\n\n\nIme:\nRatko Pilipović\n\n\nOpis
 :\nhttps://www.fri.uni-lj.si/sl/o-fakulteti/osebje/ratko-pilipovic\n\n\nE-
 mail:\nratko.pilipovic@fri.uni-lj.si\n\n\n\n\n \nProjekt EuroCC 3 je prej
 el sredstva Skupnega podjetja za evropsko visokozmogljivo računalništvo
  (EuroHPC JU) na podlagi Sporazuma o dodelitvi sredstev št. 101306701. S
 kupno podjetje EuroHPC prejema podporo programa Evropske unije Digitalna
  Evropa ter naslednjih držav: Nemčije\, Albanije\, Avstrije\, Belgije\, 
 Bosne in Hercegovine\, Bolgarije\, Hrvaške\, Cipra\, Češke\, Danske\, E
 stonije\, Finske\, Francije\, Grčije\, Madžarske\, Islandije\, Irske\, I
 talije\, Latvije\, Litve\, Luksemburga\, Malte\, Črne gore\, Nizozemske\,
  Severne Makedonije\, Norveške\, Poljske\, Portugalske\, Romunije\, Srbij
 e\, Slovaške\, Slovenije\, Španije\, Švedske\, Turčije in Kosova.Finan
 cira Evropska unija. Izražena stališča in mnenja so izključno stališ
 ča avtorjev ter ne odražajo nujno stališč Evropske unije ali Skupnega 
 podjetja EuroHPC. Zanje ne moreta biti odgovorna niti Evropska unija niti 
 Skupno podjetje EuroHPC.Nacionalni kompetenčni center SLING sofinancira M
 inistrstvo za izobraževanje\, znanost in mladino Republike Slovenije.HPC 
 in Europe je krovna znamka\, ki združuje evropske pobude na področju vis
 okozmogljivega računalništva v več kot 36 državah.\n \n\n\nhttps://in
 dico.ijs.si/event/4314/
LOCATION:ZOOM
URL:https://indico.ijs.si/event/4314/
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